Programming Logic Gate Functions in PLCs

Chapter
7
Programming Logic Gate Functions in PLCs

This presentation will focus on the material needed for this PLC class. The text covers logic theory beyond the scope of this PLC course. The Digital Electronics class at GCCC covers the material in chapter 7 in detail. You will only be studying selected pages from chapter 7 of the text.

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Permission granted to reproduce for educational use only.

Objectives

We will focus on the following:

• Describe combinational and sequential logic gate circuits.
• Create PLC ladder logic programs for NOT (inverter), AND, OR,, XOR, logic gates.
• Convert Boolean expressions to PLC ladder logic diagrams.

• Convert PLC ladder logic diagrams to logic gate circuits and Boolean expressions.

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Permission granted to reproduce for educational use only.

Combinational Logic Gates
• Do not require clock pulses to operate. • Outputs depend only on their inputs. • Outputs are generated instantaneously. • Simply called logic gates.

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Logic Gates

• NOT. • AND. • OR. • NAND. • NOR. • XOR (exclusive OR). • XNOR (exclusive NOR).

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Sequential Logic Devices
• Have outputs that depend on their inputs as well as time.
• Require clock pulses. • An inherent delay time is always
present. • Flip-flop devices.

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Sequential Logic Circuit

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Boolean Expressions
• Every gate logic function has its own equation called a Boolean expression
• Boolean algebra:
– Two states are true and false.

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Boolean Expressions (Cont.)
• True state: (1)
– Represented by the number one, called logic high or logic one in Boolean algebra.
• False state: (0)
– Represented by the number zero, called logic low or logic zero.

© Goodheart-Willcox Co., Inc.

Permission granted to reproduce for educational use only.